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master's thesis
Projektiranje naponskog regulatora u 0,18 um CMOS tehnologiji
Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing, 2015. urn:nbn:hr:168:089320
Mikulić, Josip
University of Zagreb
Faculty of Electrical Engineering and Computing

Cite this document

Mikulić, J. (2015). Projektiranje naponskog regulatora u 0,18 um CMOS tehnologiji (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:089320

Mikulić, Josip. "Projektiranje naponskog regulatora u 0,18 um CMOS tehnologiji." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2015. https://urn.nsk.hr/urn:nbn:hr:168:089320

Mikulić, Josip. "Projektiranje naponskog regulatora u 0,18 um CMOS tehnologiji." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2015. https://urn.nsk.hr/urn:nbn:hr:168:089320

Mikulić, J. (2015). 'Projektiranje naponskog regulatora u 0,18 um CMOS tehnologiji', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 05 November 2024, https://urn.nsk.hr/urn:nbn:hr:168:089320

Mikulić J. Projektiranje naponskog regulatora u 0,18 um CMOS tehnologiji [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2015 [cited 2024 November 05] Available at: https://urn.nsk.hr/urn:nbn:hr:168:089320

J. Mikulić, "Projektiranje naponskog regulatora u 0,18 um CMOS tehnologiji", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2015. Available at: https://urn.nsk.hr/urn:nbn:hr:168:089320

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Metadata
TitleProjektiranje naponskog regulatora u 0,18 um CMOS tehnologiji
Title (english)Design of a voltage regulator in 0.18 um CMOS technology
AuthorJosip Mikulić
MentorAdrijan Barić (mentor)
Committee memberAdrijan Barić (predsjednik povjerenstva)
Committee memberŽeljko Butković (član povjerenstva)
Committee memberVladimir Čeperić (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2015-09-22, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Electrical Engineering
Abstract
Ovaj rad predstavlja rješenje za integrirani regulator napona niske potrošnje. LDO (low-dropout) regulator napona projektiran je u UMC 0,18 um CMOS tehnologiji pomoću RNMC (reverse nested Miller compensation) topologije. Regulator karakterizira izlazi napon od 1,455 V, maksimalna izlazna struja od 500 uA te potrošnja manja od 4 uA. Regulacija napona napajanja i regulacija izlazne struje iznose 1,25mV/V i 1,08 mV/mA pri 500 uA, respektivno. Projektirani regulator namijenjen je za rad u temeraturnom rasponu od -20 ˚C to 60 ˚C te je prikladan za RFID aplikacije.
Abstract (english)
This paper proposes the circuit of a low power on-chip voltage regulator. The LDO (low-dropout) voltage regulator is designed in the UMC 0.18 um CMOS technology by using reverse nested Miller compensation (RNMC). The regulator provides an output DC voltage of 1.455 V with the load capability of 500 uA and the total quiescent current consumption of less than 4 uA. The line and load regulation are 1.25 mV/V and 1.08 mV/mA at 500 uA, respectively. The designed regulator is capable of operating in the temperature range from -20 ˚C to 60 ˚C and it is specially suitable for RFID applications.
Keywords
Keywords (english)
Languageenglish
URN:NBNurn:nbn:hr:168:089320
Study programmeTitle: Electrical Engineering and Information Technology
Study programme type: university
Study level: graduate
Academic / professional title: magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije (magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije)
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File originBorn digital
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Created on2018-02-06 10:43:39