Proširenje LTZVisor monitora virtualnih strojeva za višejezgrene procesore

master's thesis

• Title (english): Extending LTZVisor Hypervisor to Multicore Processors
• Author: Magdalena Halusek
• Mentor: Mario Cifrek (mentor)
• Committee member: Mario Cifrek (predsjednik povjerenstva)
• Committee member: Hrvoje Džapo (član povjerenstva)
• Committee member: Željka Lučev Vasić (član povjerenstva)
• Granter: University of Zagreb; Faculty of Electrical Engineering and Computing; Zagreb
• Defense date and country: 2020-07-13, Croatia
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Computing
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Electrical Engineering

Abstract

TrustZone je sigurnosna ekstenzija ARM-a koja već dugi niz godina pruža sigurnosnu podršku Cortex-A procesorima. Navedena ekstenzija pruža koncept Sigurnog (engl. Secure) i Nesigunog (engl. Non-Secure) svijeta. Svaki svijet se može izvršavati na jednom procesoru metodom vremenske podjele, što omogućava implementaciju dvaju operacijskih sustava. LTZVisor (Lightweight TrustZone hypervisor) je monitor virtualnih strojeva koji iskorištava TrustZone ekstenziju. Namjena LTZVisora je da implementira gotovo rješenje za upravljanje s resursima potrebnim operacijskom sustavu koji se izvršava u Sigurnom svijetu i resursima potrebnima operacijskom sustavu Nesigurnog svijeta. Početna verzija LTZVisora bila je namijenjena jednom procesoru te se je ubrzo razvila i AMP (engl. Asymmetric Multiprocessing) verzija LTZVisora koja omogućava da se Nesigurni gost i Sigurni gost izvode paralelno (bez potrebe za metodom vremenske podjele), svaki na svojoj jezgri. Ovaj rad po prvi puta predstavlja SMP (engl. Symmetric Multiprocessing) LTZVisor verziju koja, prema preporukama ARM-a, implementira rješenje u kojem se Sigurni gost izvršava na jednoj jezgri, a Nesigurni gost u SMP konfiguraciji. U radu je opisan jednostavan model komunikacije za potrebe demonstracije funkcionalnog rješenja SMP LTZVisora, gdje se jasno pokazuje kako Nesigurni gost radi u SMP konfiguraciji. Na kraju, dana su razna mjerenja za evaluaciju implementiranog rješenja.

Abstract (english)

For a long time, the ARM company provides security support by implementing TrustZone security extensions in Cortex-A processors. The security extension enables the concept of the Secure and Non-Secure world. Each of the worlds can be executed on one processor in time-sliced fashion. This fact can be used to implement two operating systems, each for one world. LTZVisor (Lightweight TrustZone hypervisor) is a simple hypervisor that exploits TrustZone security extensions. Implementation of the LTZVisor is a complete solution that enables managing of resources needed by Secure and Non-Secure virtual machines. LTZVisor was originally implemented for one core, but soon after implementing the original LTZVisor, AMP (Asymmetric Multiprocessing) version of LTZVisor was introduced. AMP LTZVisor enabled the possibility of parallel execution of Secure and Non-Secure virtual machines, each machine for one core. This thesis, for the first time, introduces the SMP (Symmetric Multiprocessing) version of LTZVisor, which follows ARM’s recommendations for implementation of SMP TrustZone applications. SMP LTZVisor enables the possibility to execute SMP software in Non-Secure world, while Secure world still executes on one core. The thesis introduces a simple communication model with purpose of demonstrating a functional SMP LTZVisor solution where it can clearly be seen that Non-Secure executes in SMP fashion. To evaluate implemented solution, SMP LTZVisor was put under a range of tests to show advantages and drawbacks of using SMP LTZVisor.

• Keywords: TrustZone; Siguran svijet; Nesiguran svijet; LTZVisor; AMP; SMP
• Keywords (english): TrustZone; Secure world; Non-Secure world; LTZVisor; AMP; SMP
• Language: croatian
• URN:NBN: urn:nbn:hr:168:792105
• Study programme: Title: Electrical Engineering and Information Technology; Study programme type: university; Study level: graduate; Academic / professional title: magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije (magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije)
• Type of resource: Text
• File origin: Born digital
• Access conditions: Closed access
• Repository: FER Repository
• Created on: 2023-01-13 12:24:06